The present invention relates to the field of semiconductor devices and their manufacture. More specifically, in one embodiment the invention provides a bipolar transistor with improved performance characteristics. The device is manufactured by a process which includes a self-aligned collector implant.
Bipolar devices and their manufacture are well known to those of skill in the art and are disclosed in, for example, copending application Ser. No. 07/503,498, which is incorporated herein by reference for all purposes. Such processes provide for the formation of an n+ buried layer in a substrate followed by formation of an epitaxial silicon layer on a surface of the substrate. A base region is implanted or diffused into the epitaxial layer, followed by formation of a polysilicon emitter above the base region.
While meeting with substantial success, such prior processes and devices have also met with certain limitations. For example, in the region of the base-collector junction, the collector is of relatively constant and relatively light dopant concentration. This limits the performance of such devices. In particular, the value of F.sub.t (the frequency at which the forward collector emitter current gain is unity) and the emitter current density are less than would be desired. Some prior devices have modified the doping of the epitaxial layer to account for these problems, but this solution tends to increase the capacitance of the extrinsic base region. Further, changes in epitaxial layer will impact all of the devices on a die, not just the bipolar devices in question.
From the above it is seen that an improved method of fabricating bipolar transistors and improved devices resulting therefrom are desired.